Let's begin with world famous program.
You can see "hello.v" in "samples" folder.
To Compile hello.v,
- Menu =>File
- Menu =>Compile Single Verilog Source
Select "hello.v" in File dialog, then compilation starts, you can see following display after compilation..
New Toolbar icons have been implemented by Tim.Ruetz
since 3.18A. If you would like old style, see here
To start simulation , just press Go
To view source code, double click the row line where "::" exists. Either Veritak Console or Compiler Status pane is available.